| Thermal Management |
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Die and Board Level Hot Spots Thermal challenges need design solutions For the past 50 years, the thermal management industry has offered only heat sinks, fans, and thermal grease as methods for electronics thermal management. During this same time electronic circuits have been packaged more tightly, generating more heat in a smaller footprint. As a result the electronics industry has reached a breaking point; a sort of thermal overload. The heat generated in these dense electronic systems can be quite large and has led to significant increases in on-chip temperatures that have reduced or limited the performance of components and systems. By Dr. Paul A. Magill, Vice President of Marketing and Business Development, Nextreme Thermal Solutions, Inc. The challenge of removing heat from ICs has increased significantly. This problem is no longer just at the chip-level but has grown to include hot spot formation on boards. The emergence of nano-electronics (90 nm feature size process technology going to 32 nm by the end of the decade) has led to localized areas of high heat flux that are dominating the performance of electronics at the chip level. This same problem can also be found at the board level where devices such as MMICs, power MOSFETs and other power devices are being placed closer to devices, such as displays, that are very sensitive to high heat fluxes. This article discusses methods for mitigating the effects of die-level and board-level hot spots through localized cooling of the on-chip heat source and the innovations that are driving new approaches in electronics cooling. Thin-Film Thermoelectrics Nextreme has introduced localized thermal management solutions deep inside electronic components using thin-film thermoelectric structures known as thermal bumps. The thermal bump was developed as a method for integrating active thermal management functionality at the chip level in the same manner that transistors, resistors and capacitors are integrated into conventional circuit designs today. The thermal bump (Figure 1) is made from a thin-film thermally active material that is embedded into flip-chip interconnects (in particular copper pillar solder bumps) for use in electronics packaging.  Figure 1. The thermal bump Unlike conventional solder bumps that provide an electrical path and a mechanical connection to the package, thermal bumps act as solid-state heat pumps pulling heat from one side of the device and transferring it to the other as current is passed through the thermoelectric material. The use of thermal bumps in power electronics offers many advantages in terms of size, efficiency and power-pumping capability. Thermal bumps today are already extremely small: 110µm (microns) in diameter by 65µm high and have the capability to be scaled to different sizes for different applications. The bump adds as little as 100 microns of thickness to a heat spreader, enabling unobtrusive integration close to the heat source. Thermal bumps have been shown to achieve temperature differentials in excess of 60ºC between the top and bottom headers and have power pumping capabilities exceeding 150 W/cm2. This makes thermal bumps ideally suited for applications involving high heat-fluxes. Today, thermal bumps can be introduced into systems at the chip level or at the board level using discrete modules. Here are a few of the integration possibilities: Die/Chip Cooling Thermal bumps can be integrated for heat removal from the back- or, front-side of the die and even laterally, as depicted in Figure 2.  Figure 2. Integrated 3D Thermal Management Back-Side Cooling Back-side cooling can be enhanced by the introduction of thermal bumps either into the heat sink to form an active heat sink or into the heat spreader. Here, discrete devices are used to mitigate hot spots generated on the front side of a die. In fact, while the following example demonstrates the feasibility of hot spot cooling using integrated thermoelectric cooling, it also reveals the limitations of cooling the hot spot from the backside of the die. The hotspot is on the active side of the die while the cooling device is attached to the copper heat spreader. The heat spreader is flipped onto the backside of the die so that the cooler is located near the backside of the die, behind the first level thermal interface material, or TIM1. Lateral Cooling In the lateral cooling concept, current flows from left to right but the heat flows from the center of the module outwards. For a 3D chip stack, this lateral heat removal concept can be combined with an interposer through which the heat can be removed. Here the thermoelectric material is underneath the substrate and the heat is pulled from the center segment to the side. In this example, the center of the platform will cool and the sides will become hotter as is shown. With this approach heat is dissipated laterally into the walls. Active-Side Cooling The last approach is active-side cooling. In Figure 3, an artist’s rendition depicts the active side of a microprocessor. The smaller structures represent conventional copper pillar bumps next to the larger thermal bump. There could be as few as 10-20 or as many as 600-1200 thermal bumps strategically placed on the chip only in the vicinity of the hot spots. For this application it is not necessary to use a large amount of thermoelectric material – and in fact as little as 1mm x 1mm per hot spot – would be consumed to achieve the desired cooling effect Placement of this material so close to the heat source would lead to a higher TEC efficiency.  Figure 3. Thermal and electrical bumps integrated on a single substrate Board Cooling Hot spots on printed circuit boards can be cooled by the introduction of discrete modules strategically placed near the source of the heat. Metal traces, which can be several microns thick, can be stacked or interdigitated to provide highly conductive pathways for collecting heat from the underlying circuit and funneling that heat to the thermal bump. Additionally, adding thermal vias (e.g., copper filled vias) would be required to provide pathways for the rejected heat. In Figure 4, two MOSFETs were replaced by one eTEC cooled MOSFET. The ~0.5 W input power for the eTEC module translated to a ~3 W increase in MOSFET output power.  Figure 4. MOSFET replacement Managing the heat flow in systems is also a problem for many manufacturers of mobile devices. Unlike electro-magnetic energy, which can be isolated or confined, heat is mechanical in nature and hence can flow in any direction. This may include flowing towards sensitive components such as LCD displays. Thermoelectrics may be used to create a thermal barrier to the flow of this energy. A thermal barrier creates a small temperature inversion that channels thermal energy away from the barrier and in a more desirable direction. A thermal barrier (Figure 5) may be constructed using several discrete thermoelectric devices but loosely spaced and powered only at a very low level. The overall design, number of modules, their spacing, and the heat spreader materials and dimensions determine the characteristics of the thermal barrier. In most cases, a 3 to 5°C temperature inversion is all that is necessary to cause the heat to flow away from a surface, in essence creating a mirror or thermal reflector. The thermal barrier can be activated when the temperature of the board reaches a critical point, thus creating an "on-demand" thermal management solution.  Figure 5: Two thermal barriers integrated into the chassis of a server Summary The use of thermal bumps and discrete devices to provide a thermal management solution does not obviate the need for system-level cooling or for a reasonable means of rejecting heat out of the system. Rather, it offers the system design engineer a new set of tools with which to shape and enhance the performance of their system. Ultimately the focus should be on cooling what you need to cool and nothing else and then manage the removal of this heat in a controlled fashion. www.nextremethermal.com |