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Testing energy efficient designs in portable electronic devices Energy efficient design techniques in portable devices have created new and complex test challenges, requiring design engineers to make numerous difficult measurements and to troubleshoot fast-changing signals, complicated protocols, and small changes in voltage and current. To validate, debug and characterise these designs, a powerful and complete measurement tool set is needed; one that has the performance and time-saving features to address the latest energy saving design techniques. By Dave Ireland, Technical Marketing Manager, Tektronix As portable electronics reach higher levels of performance and functionality, the embedded systems that drive them are also significantly more sophisticated. This means that today’s energy management techniques must look at the entire embedded system to drive down overall power consumption. An example of energy efficient design: The mobile handset A mobile handset offers a good example of the different techniques used today in energy efficient designs. Throughout the years, mobile handsets have undergone a transformation from pure voice-only devices to multimedia powerhouses featuring internet browsing, gaming, photo and music sharing, navigation and much more. Every new feature added to a mobile handset requires a portion of the often limited energy budget, yet most handsets today rely on battery capacity similar to that of a voice-only design. Achieving such rich functionality has required design engineers to forge new ground in low power design. The different circuits in the handset often require different supply voltages, necessitating that each circuit has a separate DC/DC converter. Traditional converters used linear regulators and lossy components, resulting in a power conversion efficiency of 50% or less. Today, switch-mode power supplies (SMPS) are the most common architecture, providing efficiencies of up to 90%. Power conversion measurements A SMPS minimises the use of lossy components (such as resistors and linear-mode transistors), and emphasises components that are ideally lossless (switch-mode transistors, capacitors, and magnetics), thereby enabling high power conversion efficiencies. Figure 1 shows a simplified SMPS schematic.
Figure 1: Switch-mode power supply simplified schematic Validating and characterising a SMPS often requires measuring switching loss and magnetic power loss to determine the efficiency of the SMPS. Other considerations may include power line measurements (such as power quality and current harmonics). Switching loss The switch-mode transistors used in a SMPS often have fast switching times to minimise energy loss and therefore dissipate very little power in either the On or Off states. The largest source of energy loss for a SMPS occurs during switching (due to the discharge of diode-stored charge and the discharge of energy stored in parasitic inductance and capacitance). The total energy loss for an entire switching cycle includes the switching losses (turn-on and turn-off losses) and conduction losses. The total loss is given by the formula:
ELoss = Eturn-on + Eon + Eturn-off Where:
A proper analysis of these losses is essential to characterise the supply and gauge its efficiency. Figure 2 shows switching loss measurements made with an oscilloscope. By using an oscilloscope with specialised power analysis software, switching losses and conduction losses can be measured across multiple switching cycles to determine device behaviour over time. Measurement statistics easily show how the measurement results are changing.
Figure 2: Switching loss measurements including statistics on the Tektronix MSO/DPO4000 Series oscilloscope and DPO4PWR power analysis software Accurately measuring turn-on and turn-off losses can be a challenge since the losses occur over very short time periods, while the losses during the remainder of the switching cycle are minimal. This requires that the timing between the voltage and current waveforms be very precise and that measurement system offsets are minimised. Making accurate power measurements therefore requires careful consideration of probing. Magnetic power loss Magnetic power loss affects the efficiency, reliability, and thermal performance of the power supply. Two types of power losses are associated with magnetic elements: core loss in the ferrous core and copper loss in the copper windings. Magnetic Loss = Core Loss + Copper Loss The total power loss and the core loss can be quickly derived using information from the core vendor’s data sheet and results from an oscilloscope running power measurement software. Copper loss can then be calculated from these two values. Knowing the different power loss components makes it possible to identify the cause for power loss at the magnetic component. The method for calculating the magnetic component’s total power loss depends in part on the type of component being measured. The device under test may be a single-winding inductor, a multiple-winding inductor, or a transformer. Throughout the design, components are optimised to provide the lowest power consumption. Displays that use specialised backlight LEDs provide power savings of up to 80%, when compared to the Cold Cathode Fluorescent Lamps (CCFLs) which, until recently, were commonly used in LCD displays. The use of Low Voltage Differential Signalling (LVDS) for data transmission saves power while maintaining data integrity. The most accurate and reliable method for measuring differential signals is to use an active differential probe, which places a difference amplifier near the probe tips and transmits the voltage difference to the oscilloscope. Since there is only a single oscilloscope connection per channel, differential probes can double the number of signals measured by the oscilloscope. As designs have become more complex, techniques to manage energy at the system level have emerged. Processors and communication buses (where frequency is scaled based on actual need) combined with power management that scales down voltage with frequency, offer significant reductions in energy consumption. System-level energy management Energy management techniques, such as Dynamic Power Management (DPM), Dynamic Voltage Scaling (DVS) and Dynamic Frequency Scaling (DFS), look at the system-level operation of a design for opportunities to reduce power consumption. These energy management techniques can be applied to both individual processing elements (CPUs, FPGAs, ASICs), as well as the communication buses that transfer data between them. Dynamic Power Management With DPM, processing elements and communication buses are put in to standby or sleeping modes whenever they are idle. Since it takes time and energy to reactivate these elements, DPM is carefully applied to ensure there are no violations in system operation or actually an increase in power consumption because of reactivation. Even when components are in standby mode, they dissipate energy as determined by the static power of the component. Dynamic Voltage and Frequency Scaling With DVS and DFS, the switching power dissipation is reduced by scaling down the supply voltage and operational frequency of a processing element. Since reducing the operational frequency increases the computation time, DFS can only be applied when there is slack time in the system-level operation of the design. Even if dynamic voltage and frequency scaling is applied to all components adapting their performance to the actual requirements of the system schedule and minimising energy consumption, there will still be idle times. DPM can then be used to shut down components that are idle at a specific time for even further energy savings. Energy dissipation of communications buses In embedded systems with multiple processing elements, communication between elements is essential. With every data transfer over a communications bus, the line capacitance is charged and discharged, drawing current from the I/O pins of the elements and thereby dissipating power. In the case of communications buses, the transmission voltage can only be reduced by so much because of noise issues (low voltage communications could be corrupted by noise, causing reliability problems). Similar to DFS, the operational frequency or data transfer rate of the bus can be scaled down if the system schedule has slack time for bus communication. The bus can also be put into a standby state during idle times, similar to DPM. Low Power DDR DRAM devices as well as several of today’s communication buses offer low power modes, including PCI Express®, MIPI® D-PHY and M-PHY, USB 3.0, Mobile PCI Express® Module (MXM) and others, however debugging these buses can be challenging without the right measurement tools. Finally, standby power has been minimised. It has been estimated that standby power (the power consumed by a product when it is switched off but continues to consume a reduced level of power) represents 10% or more of all residential electricity demand. For battery-powered products like mobile handsets, standby power is a result of bright displays, backlit buttons and instant-on power switches. Even with low-voltage, low-power logic and microprocessor “sleep mode” power management, standby power consumption can significantly limit battery life and the usability of the handset. Throughout the mobile handset, energy efficient design techniques have been implemented to provide a wide-range of features while maintaining long battery life. This same trend has been applied to other portable and line-power electronics. With these changes, test and measurement techniques have evolved to help engineers to effectively debug and validate their low power designs. |
