Everyone needs to be an efficiency engineer now

Author:
Alix Paultre, Editorial Director, PSD

Date
08/18/2013

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Current markets demand the best possible device & system integration

Once upon a time, to be an engineer who spent time trying to reduce power consumption meant you were either a power supply designer, or worked in the few application spaces that needed high-efficiency low-consumption systems (primarily military and aerospace). Consumer and industrial applications never thought about power consumption. Back then, the most prevalent issue then was delivery, with houses and factories having to add fatter and fatter lines to cope with the rising power consumption of the tools. Efficiency, if at all a consideration, was most commonly used to create a higher power output in the target product, not reduce overall consumption. Things began to change decades ago, but have accelerated in an almost exponential fashion in recent years. In almost every market today, manufacturers are touting differences in efficiency of a several percent between them and a competitor as a significant product selling point. This is largely driven by our migration to portable devices, but also due to our desire to reduce excess consumption at the grid level as well. The advantages to energy efficiency are many, and include longer operational life within a finite power budget (from a gas tank to a battery), more power output (more functionality) from a restricted power pipeline like USB or PoE, lower energy costs in any system (fixed or mobile) and reduced waste energy (usually expressed as heat). It has gotten to where soon all of the passives around a device will designed specifically for that device family, to maximize system operating efficiencies and address the extremely tight performance tolerances these new ICs have. To truly achieve the phenomenal efficiency the latest chips are now promising, every single part, lead, trace, passive, and peripheral IC in the system must be the best possible for that specific circuit. Today, even package-level interconnect and mounting parasitics (the poster child for this is the TO-220 package) can significantly impact the operating efficiency of a device. We see this as a beginning of a growing trend to more energy efficiency awareness at the design level across the industry and in every application space. As we move towards more and more highly-integrated ICs, chipscale packages, board-level systems, we will see more very specific device- and subsystem-oriented components to address the heightened energy efficiency awareness of the design community. Power Systems Design

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