Keysight Technologies to show simulation, debug, validation and test solutions at MemCon

Date
10/14/2014

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Keysight Technologies announced it will demonstrate solutions that provide simulation, debug, validation and test for the fastest speed memory designs at MemCon, Santa Clara Convention Center, Booth102, Santa Clara, Calif., Oct. 15.

DDR4/LPDDR4 Bus-Level Signal Insight Using Logic Analysis
Keysight’s U4154B 4 Gb/s state mode logic analyzer system is the only logic analyzer proven to capture DDR4/LPDDR4 data traffic over 3.1Gb/s. Using Keysight’s specialty probes, the U4154A/B is the only logic analysis system proven to capture LPDDR4 at 3.2 Gb/s. Keysight’s U4154B logic analyzer, used with the FuturePlus FS2510 DDR4 interposer, is the only logic system proven to capture DDR4 traffic greater than 3.1 Gb/s.

The ability to merge three modules allows the unprecedented simultaneous capture of all DDR4 ADD/CMD and R/W DATA from a DDR4 DIMM interposer. The U4154B logic analyzer utilizes new 64-bit application software to take full advantage of the memory in today’s 64-bit host operating systems.
Infiniium 90000 X-Series Oscilloscope for DDR3/DDR4 Compliance Test

The Keysight DDR3/4 compliance test application provides an automated way to quickly and accurately characterize a memory system per the JEDEC specification. The mixed signal oscilloscope (MSO) provides reliable, advanced logic triggering of read and write commands for data characterization. The new Keysight Infiniium offline user interface and setup, using DDR3/4 compliance test application software, enables compliance testing on simulated waveform files from the Keysight Advanced Design System (ADS) Compliance Test Bench.

The Keysight Advanced Design System (ADS) W2351EP DDR4 Compliance Test Bench solves the simulation-measurement correlation challenge and is available as an add-on to Keysight’s ADS electronic design automation software solution. ADS can simulate DDR4 memory systems by combining I/O models with PCB, package and connector models in flexible topologies for signal integrity analysis. The simulated waveforms are fed to the DDR4 compliance test application to 1) perform compliance testing before the PCB prototype is fabricated, or 2) to perform simulation-measurement correlation when the PCB prototype is tested in the lab.

MemCon

Keysight Technologies

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