The pursuit of higher efficiency has been a driving factor in industry progress since electricity was first harnessed. The introduction of solid state transistors in switching applications enabled the switching power converter and created a step function improvement in power conversion efficiency. Advances in switching power transistors has helped improve efficiency and reliability and reduce size and cost in power electronics applications. Wide Band Gap semiconductors, specifically GaN (gallium nitride) power transistors, are currently leading the drive to higher efficiency.
The markets and applications that benefit from GaN E-HEMTs (enhancement mode high electron mobility transistors), and therefore drive it, are comprehensive. Data center, industrial automation, wireless power transfer and charging, and renewable energy and transportation applications have benefited with the use of GaN specifically with 1/4th the power loss, 1/4th the size/weight, and substantially lower system budgets as compared to silicon-based systems. Before we discuss how GaN E-HEMTs add value to the key applications in these markets, let’s review how GaN E-HEMTs work.
Introduction to GaN: similarities and differences to MOSFETs
GaN E-HEMTs are conceptually similar to silicon MOSFETs. GaN E-HEMTs are three terminal devices with gate, drain, and source nodes. Similar to MOSFETs, a positive voltage between gate and source on the E-HEMTs enables high electron mobility path between the drain and source terminals (see figure 1). When the gate is held at or below source potential, the high electron mobility path is interrupted and no current flows between drain and source. This is true only for enhancement mode devices. GaN power transistors using depletion mode devices typically in a cascode configuration are not considered here. The complexity of cascode implementation of GaN transistors, essentially multichip modules, has limited the market acceptance of this type of product.
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Figure 1: Similar to MOSFETs, a positive voltage between gate and source on the E-HEMTs enables high electron mobility path between the drain and source terminals.
The rated voltage, typically 650 V or 100 V, is the minimum voltage transistors will block or hold off. The repetitive avalanche characteristics of silicon MOSFETs is not as easily characterized in GaN E-HEMTs, however the characterized breakdown voltage of GaN E-HEMTs has shown them to be resilient to transient voltages.
Although there are many similarities, there are some key differences between GaN E-HEMTs and MOSFETs. Silicon MOSFETs are vertical devices meaning the drain to source current flows from the top (source) of the silicon die through the MOSFET channel to the drain substrate on the bottom. GaN E-HEMTs, on the other hand, are lateral devices so the drain to source current flows into the drain terminal on the top of the device, through the high mobility channel to the source terminal, also on the top of the device.
GaN power transistors are manufactured by growing layers of GaN and AlGaN (aluminum GaN) on silicon substrates – the same as standard Si MOSFETs used in high volume. The hetero-interface between GaN and AlGaN forms a two-dimensional electron gas (2DEG) and is the basis for a high mobility channel. The 2DEG formed has very high charge density and mobility which results in very low drain to source resistance, RDS(on), and very high-speed devices. The 2DEG is a native characteristic of the GaN-AlGaN interface so the gate of device must provide a method to interrupt the channel for use in power converter applications. This accomplished by creating a P-type GaN interface that depletes a 2DEG channel underneath the gate. This produces the normally off e-mode transistor, controlled with a positive gate bias turn on the 2DEG.
The GaN E-HEMT structure has the added feature over Si MOSFET of having no body diode or parasitic bipolar junction transistor. The benefits in switching power applications is that there is no reverse recovery body diode loss and high and has voltage slew rate ruggedness, which are traditional weaknesses in Si MOSFETs.
The switching loss analysis of GaN E-EHEMTs is again similar to the analysis for MOSFETs. The main switching loss mechanism is set by the device capacitances and gate charge values. Since the values of gate charge and node capacitance are much smaller than MOSFETs, GaN E-HEMTs losses are significantly reduced. The input, output, and reverse capacitance of GaN deliver low-loss turn on and fast transitions resulting in no loss in dv/dt (Miller plateau) period during turn on. Effectively GaN E-HEMTs are similar to MOSFETs with much faster, more efficient switching, and reduced conduction losses.
Packaging & Layout
With the fast transition speed, high frequency ability, and high current capability comes the responsibility to use GaN power transistors effectively. Traditional plastic packaging for high power semiconductors like TO-247 and TO-220 are bulky and add significant resistance and inductance to the transistor die. Smaller transistor packages, like TO-263 or DFN packages have helped to reduce extrinsic transistor impedances but are effectively restricted to lower power application due to size and lead frame requirements. To get the best possible performance, GaN E-HEMT packages require extremely low inductance, small size, low inductance pin to die connections, and low thermal resistance, RθJC. GaN Systems uses GaNPX® package material, a high temperature epoxy-based PCB material that is similar to FR4 with a higher temperature rating. This embedded packaging technology allows the electrical connections to be made with the platter copper pillars and vias and no wire bonds, minimizing resistance and inductance. The thermal connection to the substrate also utilizes copper connections to make a very low thermal resistance between the transistor substrate and GaNPX® thermal pad (see figure 2). The low inductance, low thermal impedance, small footprint package also improves system performance by enabling low impedance external connections to the GaN E-HEMT. The lower overall inductance and resistance can accommodate high slew rates and maintain with lo VDS overshoot and lower electromagnetic interference.
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Figure 2: The thermal connection to the substrate also utilizes copper connections to make a very low thermal resistance between the transistor substrate and GaNPX® thermal pad.
Improved System Performance with New and Enhanced Topologies
Power factor correction (PFC) circuits have conventionally been built with front end bridge rectifiers to begin the power conversion process of turning AC power into DC power and forcing the current to follow the AC line voltage. Eliminating the front-end rectifier losses is possible by implementing a bridgeless totem pole circuit (BTP) (see Figure 3). The BTP PFC topology uses switching transistors and attains much lower losses than a bridge rectifier implementation. Before GaN power transistors were available, silicon MOSFETs were the only choice for BTP configurations. Implementing BTP with MOSFETs saw only a slight improvement because reverse recovery losses of the high side synchronous MOSFET of the boost circuit all but erased the gains of removing the bridge rectifier. With no parasitic body diodes and the reverse conduction capabilities of GaN E-HEMTS, the reverse recovery losses in BTP PFC are eliminated and the true value of topology is realized. Increased efficiencies from 97.5% to 99% have been attained. With the lower losses, higher frequency and reduced part count, smaller, less expensive, cooler, and more reliable front-end PFC have been realized for applications needing PFC.
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Figure 3: Eliminating the front-end rectifier losses is possible by implementing a bridgeless totem pole circuit (BTP).
The most popular topology for isolated DC-DC converters is the LLC half-bridge that achieves zero voltage switching (ZVS). It is widely used in power levels from 75 W to 750 W because it achieves high efficiency through resonant switching and elegant magnetic design. This topology has been extensively used for the last twenty years using standard Si MOSFET technology. GaN power transistors, with their very low output capacitance (COSS) and high switching frequency capabilities are further enhancing the value LLC. Sufficient dead time is required in LLC converters to achieve ZVS and reap the benefits of the topology. The dead time is a function of the value of the magnetizing inductance of the converter’s transformer, the COSS of the switching transistors and the switching frequency, as shown in equation 1:
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Equation 1: Dead time is a function of the value of the magnetizing inductance of the converter’s transformer, the COSS of the switching transistors and the switching frequency
The significantly smaller COSS of the GaN E-HEMTs compared to silicon transistors allows for larger magnetizing inductance which equates to lower transformer losses. This also lowers the rms current through the half-bridge power switches and thus reduces conduction losses. The smaller COSS also allows for a higher switching frequency, smaller resonant tank, and therefore provides higher power density. Compared to Si MOSFETs, GaN E-HEMTs can reduce gate drive loses by a factor of 50 times (from 2.8 W to 50 mW) in a 200W LLC converter operating at 1 MHz – increasing efficiency by 1.5% by reducing gate drive losses in addition to lowering the losses in the LLC commutation circuit. .
GaN Enabling New Applications
Wireless power transfer with spatial freedom and high power levels has been enabled by GaN E-HEMTs due to high frequency and high efficiency. Low gate charge, QG, is key to achieving high efficiency as switching frequencies increase. As an example, a 50W, 6.78 MHz Class E wireless power transmitter with 90% target transmit efficiency would use 56% of its power loss budget to drive MOSFETs compared to only 4% when using GaN E-HEMTs (figure 4).
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Figure 4: 50W, 6.78 MHz Class E wireless power transmitter with 90% target transmit efficiency would use 56% of its power loss budget to drive MOSFETs compared to only 4% when using GaN E-HEMTs
GaNPX® packaging technology and GaN design and manufacturing know-how, produce the lowest RDS(on), lowest gate charge, lowest capacitance and lowest parasitics portfolio of enhancement mode GaN HEMTs for 650 V and 100 V applications.
GaN E-HEMT transistors have become mainstream in power electronics design. They enable and enhance topologies like BTP PFC and LLC. GaN E-HEMTs have made wireless power transfer and charging functional reality. The lower parasitics and thermal stress, and ease of use have created widespread adoption of GaN technology. Higher efficiency and higher density in datacenter, industrial automation, renewable energy, and automotive applications are highly valued. The benefits of GaN collectively lower system, shipping, installation, maintenance, and operating costs.