Microsemi, a leading provider of semiconductor solutions differentiated by power, security, reliability and performance, today announced the availability of its new cost-optimized PolarFire field programmable gate array (FPGA) product family, delivering the industry’s lowest power at mid-range densities with 12.7 Gbps Serializer/Deserializer (SerDes) transceivers as well as best-in-class security and reliability. The FPGA product family is ideal for a wide range of applications within wireline access networks and cellular infrastructure, defense and commercial aviation markets, as well as industry 4.0 which includes the industrial automation and Internet of Things (IoT) markets.
“Our new FPGA product family transforms the way the market thinks about traditional mid-range FPGAs,” said Bruce Weyer, vice president and business unit manager at Microsemi. “For the first time a non-volatile FPGA, with all its known benefits, provides tangible power and cost benefits over SRAM FPGAs that feature 10 Gpbs transceivers—thus delivering the differentiation necessary to cater to our customers’ ever-evolving requirements and simultaneously filling a void in the market.”
Microsemi’s PolarFire FPGAs enable the company to increase its FPGA addressable market to over $2.5 billion covering both the low end and mid-range FPGA market segments. In addition, the innovative features of the new product family support Microsemi’s continued growth within the communications infrastructure market.
Today’s cellular infrastructure and wireline access networks are facing a rapid transformation, having to deliver terabytes of high value content to consumers while reducing operational and capital expenditure spend, as well as reducing their thermal and carbon footprint. Microsemi’s PolarFire FPGAs provide cost-effective bandwidth processing capabilities for the increasing number of converged 10 Gpbs ports with the lowest power footprint. The new FPGA product family also addresses the market’s growing concerns over tangible cyber security threats as well as reliability concerns that face deep submicron SRAM-based FPGAs as they relate to single event upsets (SEUs) in their configuration memory.
The new devices are ideal for a number of applications within the communications market, including wireline access, network edge, metro (1-40G); wireless heterogeneous networks, wireless backhaul, smart optical modules and video broadcasting. The devices are also well-suited to applications within the defense and aerospace market, such as encryption and root of trust, secure wireless communications, radar and electronic warfare (EW), aircraft networking, actuation and control. Ideal applications for the FPGAs within the industrial market include process control and automation, machine vision processing and analytics, programmable logic controllers, industrial networking, and video and image processing.
“PolarFire FPGAs enable customers to forego purchasing FPGAs with higher power and cost to obtain the 12.7G transceiver performance required for many mid bandwidth applications, while extending the benefits of our ultralow power, high reliability and high security,” said Shakeel Peera, senior director, SoC product marketing at Microsemi. “Combining the availability of the cost-effective PolarFire FPGAs with Microsemi's broad portfolio of application-specific standard products (ASSPs) enables end-to-end solutions in timing, voice processing, storage, Optical Transport Network (OTN) switching and transport, and power management across multiple market segments.”
Microsemi has been actively engaged with select customers in its Early Access Program, and adoption of the product family has already begun.
“In addition to developing leading-edge video compression, communication, test and measurement, networking and consumer products, A2e Technologies also supplies related intellectual property (IP) and design services to Microsemi’s customer base,” said Allen Vexler, CTO of A2e Technologies. “The promise of getting an FPGA from Microsemi with higher performance signal processing and input/output (I/O) capabilities at very low power consumption changes the way we think about developing streaming video products for surveillance, drones and DVRs―and it opens up a whole range of new possibilities.”
Key Features & Benefits
In collaboration with Silicon Creations, Microsemi has developed a 12.7 Gbps transceiver fully optimized to be area efficient and low power, resulting in total power of less than 90 milliwatts (mWs) at 10 Gbps. With best-in-class low device static power of 25 mW at 100K logic elements (LEs), zero inrush current and unique Flash*Freeze mode for best-in-class standby power of 130 mWs at 25 degrees C, PolarFire devices are up to 50 percent lower power than competing FPGAs for the same application.
Microsemi also provides customers with a power estimator to analyze power consumption of their designs. After implementation, the SmartPower Analyzer can be used to access full design power.
The FPGA family also provides the industry’s best reliability with its inherent immunity to configuration SEUs. Additional features to aid with reliability include built-in single error correction and double error detection (SECDED) as well as memory interleaving on large static random access memory (LSRAMs), and system controller suspend mode for safety critical designs.
Leveraging Microsemi’s expertise in security, PolarFire FPGAs offer Cryptography Research Incorporated (CRI) patented differential power analysis (DPA) bitstream protection, integrated physically unclonable function (PUF), 56 KB of secure embedded non-volatile memory (eNVM), built-in tamper detectors and countermeasures, true random number generators, integrated Athena TeraFire EXP5200B Crypto Co-processors (Suite B capable) and a CRI DPA countermeasures pass-through license.
The devices’ cost-optimized architecture uses 28 nanometer (nm) Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) non-volatile process technology on standard complementary metal oxide semiconductor (CMOS). PolarFire FPGAs also incorporate transceiver performance optimized for 12.7 Gbps enabling smaller size and lowest power, hardened I/O gearing logic for double date rate (DDR) memory and low-voltage differential signaling (LVDS), high performance security IP and the industry’s only low cost mid-range device with clock and data recovery (CDR) capable 1.6 Gbps I/Os.
Software and IP
Microsemi’s Libero SoC Design Suite offers high productivity with its comprehensive, easy to learn, easy to adopt development tools for designing with the company’s cost-optimized PolarFire FPGAs. The suite includes a complete design flow with Synopsys Synplify Pro synthesis and Mentor Graphics ModelSim Pro mixed-language simulation with best-in-class constraints management, and Microsemi’s differentiated FPGA debugging suite, SmartDebug. Popular IP solutions for 1G Ethernet, 10G Ethernet, JESD204B, DDR memory interfaces, AXI4 interconnect IPs and others are available for use with PolarFire devices.
Other PolarFire Key Features
• High-speed serial connectivity with built-in multi-gigabit multi-protocol transceivers from 250 Mbps to 12.7 Gbps
• Up to 481K logic elements consisting of a four-input look-up table (LUT) with a fracture-able D-type flip-flop
• Up to 33 MBs of RAM
• Up to 1480 18 x 18 multiply accumulate blocks with hardened pre-adders
• Integrated dual PCIe for up to x4 Gen2 endpoint (EP) and root port (RP) designs
• High-speed I/O (HSIO) supporting up to 1600 Mbps DDR4, 1333 Mbps DDR3L and 1333 Mbps LPDDR3/DDR3 memories with integrated I/O gearing
• General purpose I/O (GPIO) supporting 3.3 volts (V), built-in clock and data recovery (CDR) for serial gigabit Ethernet (SGMII), 1067 Mbps DDR3 and 1600 Mbps low-voltage differential signaling (LVDS) I/O speed with integrated I/O gearing logic
Microsemi’s PolarFire FPGA product family is shipping to early access customers now and samples for general availability will be offered in the second quarter of 2017. Orders for samples can be placed immediately. For more information, visit www.microsemi.com/polarfire or contact email@example.com.