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    ON Semi & Hexius expand analog functionality for next-gen mixed-signal ASICs

    01/09/2017

    ON Semiconductor, driving energy efficient innovations, has announced a collaboration with Hexius Semiconductor to qualify several of their analogue intellectual property (IP) blocks in its popular ONC18 0.18 µm CMOS process. This enables ON Semiconductor to better serve its customers with proven analogue IP that can ultimately reduce design cycles and time-to-market. The eight initial designs resulting from this collaboration include a variety of analogue-to-digital converters, digital-to-analogue converters, voltage references and current references. There is provision, if needed, for the designs to be custom-tailored to match particular application demands. Further data converter and PLL designs are currently being developed for introduction later this year.

    ON Semiconductor’s ONC18 process relies on a 0.18 micrometre (µm) CMOS architecture and due to its high voltage capabilities is extremely well suited to automotive, industrial, military and medical deployment. By having access to an expansive portfolio of qualified IP that supports this process, customers will be able to benefit from ASIC implementations that are highly optimized for their specific requirements, without needing to allocate too much of their own engineering resources to the task. As a result, much quicker design cycles, reduced risk of re-spins and lower associated costs can all be realised.

    “The mixed signal ASIC market continues to grow as systems need to utilise the real-word data that is captured by sensors and user interface,” states Rocke Acree, Director of the Custom Foundry business unit at ON Semiconductor. “OEMs are looking to integrate more effective proprietary designs, rather than relying on standard off-the-shelf components. Through this, performance levels can be enhanced, board space saved and unit costs significantly lowered. By working together, ON Semiconductor and Hexius Semiconductor are delivering qualified analogue IP needed to facilitate this migration and enabling a new era of mixed signal design.”

    “Through the combination of the respective skill sets that our two companies possess, we are in a position to supply the industry with qualified analogue IP macrocells on superior semiconductor processes that will deliver clear performance and logistical advantages. This will allow OEMs to respond more quickly to market opportunities that they have identified by taking products from the concept phase right through to full commercial production in the shortest possible time,” adds Chris Cavanagh, CEO at Hexius Semiconductor.

    ON Semiconductor

    Hexius Semiconductor

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