During the Applied Power Electronics Conference and Exposition (APEC), held at the Fort Worth Convention Center, the revised PMBus Power System Management Protocol Specification V1.3 will be introduced. Power Electronics Standards session IS2-1-5, “An Introduction to Revision 1.3 of the PMBus Specification” will be presented by Travis Summerlin from Texas Instruments and Mike Jones from Linear Technology. At 4PM that afternoon, a one hour follow-up session entitled “Live Q&A: Find Out More About Revision 1.3 of the PMBus Specification” will be held at the adjacent Omni Hotel in Fort Worth Ballroom #5.
The PMBus Power System Management Protocol Specification provides a standardized method of communication to power conversion and power management devices. A set of power supply oriented commands provides a common method for configuring, controlling and monitoring power. The PMBus protocol is transported over the SMBus serial bus due to its cost effectiveness and common use in the market. I2C compatible designs of the SMBus allow PMBus use in a number of markets that are familiar with and that already implement this form of serial bus. System designs using SMBus or I2C use a host controller to ‘master’ the bus.
PMBus V1.3 will be backward compatible. The significant differences between PMBus V1.3 and the previous PMBus V1.2 are summarized as follows:
1. 1 MHz bus speed vs. 400 kHz limit for PMBus V1.2.
2. Floating point data format: supports NaN and +/-Inf, 16 bit number, IEEE 754 half precision and it allows easy conversion to C types.
3. Relative voltage thresholds: allows programming all output voltage related values thresholds as a percentage of the output voltage.
4. Zone Read/Write: enables partitioning of devices by zone for intelligent queries and operations.
5. Adaptive voltage scaling (AVS): dedicated bus to statically and dynamically control processor voltages.
6. First to Fault mechanism: enables easier detection of the root cause of a fault.
The PMBus standard has quickly been adopted in major market segments due to its flexibility and robustness. With its embellishments, V1.3 has broad implications for manufacturers of FPGAs, ASICs, SoCs, networking and communication processors, core processors for computing, server and storage markets, and any other type of core processor that will benefit by adaptively altering its own supply voltage.