At electronica 2024, onsemi launched its Treo platform, which we covered in this column. Treo was intended to integrate multiple different subsystems into a single die to make life easier for designers. At the time of launch, Treo only had a few physical products, but the platform has since expanded and is now becoming an integral part of onsemi’s strategy.
Alessandro Maggioni, Senior Regional Marketing Manager EMEA starts by explaining, “We have used the time from launch until now to create the backbone of the new IP and perfect the manufacturing. It is a continuous, rolling process every time we develop a new product. In 2024, we released one or two products which were mainly ASIC dedicated, and last year was similar. From the beginning of 2026, we have already released more than 20 general purpose and ASSP devices. The original devices were simpler, for example, standard products such as a voltage translator with integrated sensor. Now, we are moving on to more complex products, with a range of analog, mixed signal and digital components and integrated DSPs and microcontrollers. 2026 will be the year in which we will see an explosion of new Treo parts.”
onsemi decided to build the platform on a single 65nm process rather than use separate dies in a package. Maggioni says there were several reasons for that, including that the monolithic approach produces a more compact design and that it allows onsemi to keep control of all aspects of the process. Different dies would also be more difficult to integrate with complex bonding and a mix of technologies would be much harder to test. The single Treo die has all the functions embedded using a well understood in-house technology. It also allows IP to be reused as necessary through the company’s SoC model.
According to Maggioni, the analog IP offers all of the necessary attributes for a wide variety of designs. It offers efficiency, high bandwidth, and performance along with fast communications. He continues, “If you think about a standard power power supply, you need efficiency and bandwidth, and one of the main challenges is to have the full control of specifications, such as the overload and the undershoot of the voltage. The analog IP in the 65nm platform technology has very fast bandwidth, increased efficiency and offers a tight control loop. It also has fast sensor interfaces to help integrate quicker computation IP. The platform is also designed for extremely low power consumption, to assist in battery powered applications. Besides those traits, the technology can work with a wide variety of input voltages and across a broad temperature range”
Treo will only grow in importance for onsemi in the future. New products will be translated into IP blocks for the Treo platform as a matter of policy, and one of the company’s centres of excellence will also be responsible for building new IP blocks for specific applications, which will give onsemi the ability to more quickly build new Treo products and update existing ones.