Energy Efficiency




Tunnel transistor may meet power needs of future chips


University of California Santa Barbara/Nature

Schematic diagram illustrating the cross-sectional view of the ATLAS-TFET with ultra-thin bilayer MoS2 (1.3 nm) as the channel and degenerately doped p-type Ge as the source. Path for electron transport is shown by the red arrows, which run vertically (indicating band-to-band-tunnelling, BTBT) from the Ge source to the MoS2 and then laterally through the MoS2 layers (via drift diffusion) to the drain. As the Ge is highly doped, the tunnelling barrier height is mainly determined by the effective band overlap between Ge and MoS2 while the tunnelling width is determined by the MoS2 thickness (including the van der Waals gap).

A new kind of transistor consumes 90 percent less power than conventional transistors, dramatically exceeding a theoretical limit for electronics, researchers say. These findings could one day lead to super-dense low-power circuits as well as ultra-sensitive biosensors and gas sensors, the investigators added.

The relentless advance of computing power over the past half-century has relied on constant miniaturization of field-effect transistors (FETs), which serve as the building blocks of most microchips. Transistors act like switches that flick on and off to represent data as zeroes and ones.

A key challenge that FETs now face is reducing the power they consume. The switching properties of conventional FETs are currently restricted by a theoretical limit of 60 millivolts per decade of current at room temperature. This limit, known as the subthreshold swing, means that each 60-millivolt increase in voltage leads to a 10-fold increase in current. Lowering the swing would yield better channel control, so switching would require less energy.

One way that scientists have sought to overcome this limit is with tunnel FETs (TFETs). These devices take advantage of the ability of electrons to penetrate barriers, a phenomenon known as quantum tunneling. In theory, quantum tunneling should enable TFETs to switch on and off with much lower voltages than conventional FETs.

Now researchers at the University of California, Santa Barbara (UCSB), and Rice University in Houston, Texas, have developed a TFET that could operate with voltages as low as 0.1 volts. This led to a more than 90 percent reduction in power consumption compared with conventional FETs. The scientists and engineers detailed their findings in the 1 Oct. issue of the journal Nature.

“This transistor represents a major breakthrough in the electronics and semiconductor industry,” says study co-author Kaustav Banerjee, an electrical engineer at UCSB.

The new TFET is made from two atomically-thin layers of semiconducting molybdenum sulfide crystal on top of a substrate of germanium. It achieved a subthreshold swing as little as 3.9 millivolts per decade of current.

Until now, the only experimental TFET to meet the International Technology Roadmap for Semiconductors’ (ITRS’s) goal of average subthreshold swing below 60 millivolts per decade over four decades of current was a transistor that used nanowires. But that type is often challenging to fabricate using conventional semiconductor manufacturing techniques. This new TFET not only meets the ITRS goal, it also uses flat channels that are easier to fabricate.

UCSB’s Banerjee suggests that potential applications for these new TFETs may include ultra-low-power electronics and computing, longer battery life or lower power consumption in data centers to reduce their costs and greenhouse gas emissions, and ultra-sensitive and low-power biosensors and gas sensors to enhance the Internet of Things.

However, Banerjee cautions that TFETs are not designed for speed or high performance. “They are desirable for low-power electronics,” he says.

University of California, Santa Barbara

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