Altera announced that it will demonstrate industrial solutions based on its field-programmable gate arrays (FPGAs) and SoCs at the SPS IPC Drives conference in Nuremberg, Germany, from November 25 to 27. Altera will share how industrial systems designers can use its FPGAs and SoCs to significantly reduce cost and time to market for factory automation system designs.
Altera's stand (#270, Hall 3) will feature a variety of solutions enabled by Altera Cyclone V and MAX 10 devices.
*Programmable logic controller (PLC) for Internet of Things (IoT) and Industry 4.0—Single-chip high-end PLCs enabled with secure enterprise cloud connectivity over OPC-UA with an Altera Cyclone V SoC. This demo features a full touch-screen human machine interface (HMI) and OPC-UA-based PLC reference design by Altera partner Exor International, and SoC security IP from Altera partner Barco Silex.
*Motion-control acceleration—A high-performance precision pick-and-place robotics system, enabled by motion control acceleration with an Altera Cyclone V SoC.
*Smallest form-factor FPGA drive-on-chip—A single-chip, high-performance, low-cost motor drive in an integrated, space-saving package using Altera's new MAX 10 FPGAs, the only FPGAs with dual-configuration, analog-to-digital converter (ADC), digital signal processing (DSP) and instant-on capabilities.
*Functional Safety—Industry's most comprehensive FPGA-based functional safety offering consisting of safety board and reference designs from Altera partner NewTec in conjunction with Altera's TUV-qualified functional safety data packages for IEC 61508.
*High-productivity design flows for SoC—From C/C++ or Simulink models and using model-based and software-based tool flows from Altera and MathWorks, this demo shows how one can directly partition designs across embedded ARM Cortex-A9 processors and FPGA fabric in Altera SoC devices.
*Machine Vision—High-performance machine vision applications in an Altera Cyclone V SoC, demonstrated by EBV Electronik with IP from DreamChip.
*Industrial Ethernet—Multiple industrial Ethernet protocols implemented in a single flexible Altera FPGA, leveraging IP developed by Altera partner Softing.
*High-availability redundant Ethernet—Demonstration of a scalable, triple-speed Gigabit Ethernet Layer 2 switch with seamless redundancy in an Altera FPGA, with high-availability seamless redundancy (HSR) and parallel redundancy protocol (PRP) IP developed by Altera partner Flexibilis.