Are you SiC of Silicon? - Part 2

By: Anup Bhalla, Vice President Engineering, UnitedSiC


Part 2 of a 6 part series: Application Trends in SiC

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Anup Bhalla, Vice President Engineering, UnitedSiC

State of SiC Device and Package Technology

It has long been known that packaging technology is key to unleashing the potential of wide-bandgap (WBG) devices. Silicon Carbide device manufacturers have been making rapid improvements in device technology figures of merit such as on-resistance per unit area (RdsA) while simultaneously reducing capacitances for faster switching. New discrete packages are being launched that allow users to better exploit WBG fast switching performance. Standard modules are increasingly available, and new advanced technologies are being applied to increase product value by allowing fast switching, improved thermal resistance and reliability.

Device technology

SiC Schottky diodes account for over 50% of SiC sales, mostly in the 650V, 1200V and 1700V class. 650V diodes serve the power factor correction circuits (PFC) in computer, server and telecom power supplies, and secondary rectifiers in high voltage battery chargers. 1200V and 1700V diodes are used in a wide range of circuits serving solar boost circuits, inverters, welding and industrial supplies.

SiC Schottky diodes offer a large QRR reduction relative to Silicon fast recovery diodes, and consequently, they help cut EON losses in the switches for half-bridge or chopper circuits operated in hard-switched continuous conduction circuits. Since pure Schottky diodes suffer from weakness in avalanche and under forward surge conditions, most manufacturers offer JBS diodes, where PN junctions are added to both shield the Schottky interface from high electric fields to reduce leakage and improve avalanche robustness, and to allow PN junction bipolar injection under surge condition to reduce forward voltage drop.

In general, SiC diodes have much lower surge capability than Silicon fast recovery diodes. This is largely due to the large on-state drop under surge conditions, which might be just 1-2V for silicon, but may be 4-6V for SiC. Since SiC diode die are also much smaller, this poses a thermal challenge. Manufacturers have used wafer thinning to reduce the on-state drop, as well as reduce the thermal resistance. Advanced die-attach schemes in TO and DFN packages, such as Silver (Ag) sintering, are employed to minimize thermal resistance and prevent melting under surge conditions typical of traditional solder joints. This helps provide adequate surge capability of about 8-12X rated current.

In terms of yields and current ratings, UnitedSiC offers 100A, 1200V and 200A, 650V diodes for use in power modules. A wide range of Ag sintered (Pb-Free, Green) diodes are offered and are AEC-Q101 qualified to allow use in automotive applications.

SiC Transistor Technology

Figure 1 shows the main device structures that dominate the market for 650V high performance FETs for power conversion, of which Gallium-Nitride (GaN) HEMTs (High electron mobility transistors) are the only lateral device with both power terminals on the top surface of the wafer. Silicon Superjunction devices use the charge balance principle, where equal doping of the n- and p-columns amounts to essentially zero net charge, and can therefore allow rapid depletion for voltage support, even if the n-columns are heavily doped for low resistance. Between 2000-2018, adding more n-columns per unit area has helped improve the on-resistance to nearly 10X below the traditional silicon limit without charge balance. Silicon Superjunction technology accounts for over $1B in annual sales and provides on-resistance per unit area (RdsA) values as low as 8mohm-cm2 at the leading edge, with other suppliers offering 12-18mohm-cm2. GaN HEMTs are now available with excellent switching behavior, with RdsA currently in the range of 3-6mohm-cm2. These are lateral devices built on silicon substrates, which are much cheaper than SiC substrates, but currently GaN devices remain more expensive that Si devices. SiC Trench and Planar MOSFETs at 650V are available as well, with RdsA in the range of 2-4mohm-cm2. UnitedSiC Gen 2 trench JFETs (UJC06505K) achieved RdsA values of 0.75mohm-cm2. This means the SiC JFET die could be made 7-10X smaller the silicon, and even a lot smaller than GaN or SiC MOSFET structures. This becomes important if one goal is to achieve cost parity with silicon.

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Figure 1: Most commonly used device architectures for 650V transistors in Silicon Superjunction, GaN HEMT, Silicon Carbide (SiC Planar or Trench MOSFET) and SiC Trench JFET (Junction Field Effect Transistor). Most power devices are vertical, which provides room for high current electrodes. GaN HEMTs are lateral and have both power electrodes on the top surface


UnitedSiC FETs use a cascode structure as shown in Figure 2, where a low cost 25V Silicon MOSFET is co-packaged with a normally-on SiC JFET to form a device that can be used together with any normally-off MOSFET, IGBT or SiC MOSFET. This device also has excellent behavior in the freewheeling diode mode and removes the need for anti-parallel silicon fast recovery diodes used with IGBTs or SiC Schottky diodes.

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Figure 2: Inside a UnitedSiC cascode FET, a 25V Silicon MOSFET is co-packaged with a SiC JFET to provide normally-off operation, simplified gate driving and excellent body diode behavior. This device can be dropped into existing Silicon MOSFET and IGBT sockets, as well as used interchangeably with SiC MOSFETs of all types


Figure 3 compares the structures of the IGBT, SiC MOSFET and Trench JFET. IGBTs are bipolar devices which turn-on with a 0.7V knee, after which, the resistance of the wide voltage blocking layer is reduced by injection of charge carriers. Since these carriers must be removed to return the device to a blocking state, there is inevitable “switching” loss, which is much larger than that encountered with SiC MOSFETs. Here too, the UnitedSiC cascode provides the lowest resistance per unit area of silicon carbide and can even be dropped directly into IGBT sockets without changes to the gate drive, to achieve efficiency benefits. As explained in the last article, the absence of the knee voltage in SiC MOSFET and SiC Cascode FET conduction leads to efficiency benefits even in low frequency applications.

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Figure 3: At 1200V and above, the most commonly encountered device structure in Silicon is the field stop IGBT. The structures of the SiC MOSFET and SiC trench JFET are shown along side. The SiC devices use 10X thinner voltage blocking layers with 100X higher doping levels, allowing for low resistance. Silicon IGBTs lower their resistances by injecting stored charge in the on-state, which must be added and removed in each switching cycle


Figure 4 takes a deeper look at the various SiC transistor alternatives currently on the market. Most suppliers offer the SiC Planar MOSFET, while some have introduced trench MOSFETs. All SiC MOSFETs suffer from poor mobility in the channel (about 15-30X worse than silicon), but trench MOSFETs are better due to the crystal orientation of the channel.  The trench JFET has a bulk channel with a much higher mobility, leading to the lower resistance per unit area in 650V-1700V rated devices.


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Figure 4: Device structures for SiC Planar and Trench MOSFETs, and the SiC trench JFET. MOSFETs have a channel induced under the gate oxide by voltage applied to the gate. The JFET channel exists without voltage and is pinched off by reverse biasing the gate-source PN junction. The low resistance of the trench JFET comes from the bulk channel, and not needing to shield the gate oxide from high fields


SiC devices generally operate at 10X the electric field of silicon devices, which follows from the 10X thinner voltage supporting layers they are built on. While this is not an issue in a bulk channel device like the JFET, careful attention is required in MOSFETs at the oxide/SiC interface to avoid levels of oxide stress that would reduce operating lifetime or cause excessive failure rates. In both planar and trench JFETs, managing this field by shielding the gate oxide inevitably leads to a further increase in on-resistance.

SiC JFET resistances are now so low, the SiC substrate on which the device is built contributes over 50% of the resistance in the 650V class, and 30-40% in the 1200V class. For this reason, wafers are thinned to 100-150um from a starting thickness of 350um, and a patented method is used to form a laser assisted backside contact. Extending this technology and improving cell designs is expected to further reduce the on-resistances to 0.5mohm-cm2 at 650V and 1.0mohm-cm2 at 1200V. It is therefore likely that SiC cost reductions being driven by rapidly expanding volumes, can get a further boost from these technology improvements.

Most production today occurs on 6-inch wafers, and 8-inch efforts have begun. Individual devices rated at 100A-200A are now available. UnitedSiC now produces a 9mohm, 1200V Stack cascode chip (5.7x6.3mm) and a 5.7m, 1700V chip (8x8mm). These high current devices can simplify high current modules, by reducing the number of devices that need to be paralleled.

Package technology

SiC devices are offered both as discrete devices and in power modules, when high power levels are required. The market is currently dominated by power discrete devices, with rapid growth in module adoption.

Figure 5 shows the range of discrete packages available for SiC diodes and transistors. UnitedSiC is rapidly adding package types to provide power circuit designers with all the choices they need to meet their system constraints. Almost all these packages are well known, industry standard packages that have been used extensively with silicon devices. While the form factor of the package is kept unchanged, many internal enhancements can be done to better exploit the capabilities of SiC devices.

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Figure 5: The typical range of package options available for SiC discrete diodes and transistors, with power ratings increasing from left to right. Devices from 2A to 200A are available in discrete form. Source Kelvin packages will gain prominence for SiC Transistors since they enable much faster switching


Nearly all UnitedSiC diodes and transistors use Ag sintering to attach the SiC die to the lead frame. Along with chip thinning, this helps to overcome the thermal resistance challenge posed by reduced chip sizes.

The recent introduction of TO247-4L, D2PAK-7L and DFN8x8 devices for SiC helps overcome some of the gate drive problems associated with switching fast with more established packages like D2PAK-3L, TO220-3L and TO247-3L that have large common source inductance. While traditional 3-leaded packages are the industry workhorse, a shift is underway to the “Kelvin Source” packages because they allow much cleaner and faster switching with little or no cost impact.

Cascode devices generally have limited controllability of the turn-off transient by modifying the gate resistance, especially if the longer delay times that result interfere with circuit operation. To manage that, UnitedSiC offers devices with separate speed ranges which are internally pre-adjusted for a certain maximum switching speed (UJ3C and UF3C series). If the circuit suffers from excessive voltage overshoots or power loop ringing, small RC snubbers are very effective with minimal loss impact. A user guide is available on the UnitedSiC website to assist users with gate drive and snubber recommendations to make the devices easy to use.

Given the increasing current densities of SiC devices relative to silicon devices, the packaging technology to extract current from the top source terminal is also being improved. Technologies such as aluminum ribbon bonding, copper thick wire bonding using a copper buffer, packaging without bond wires using Cu clips are among the main methods emerging to extend power cycling life of SiC transistors in both discretes and power modules.

Embedded packaging is also expected to allow for more improved low inductance architectures in the future, even allowing the incorporation of drivers and capacitors to improve fast switching efficiency though inductance minimization.

A wide range of power modules are now coming to market, from smaller modules like the Easy-1B/2B, to larger modules in standard IGBT like foot prints, such as the 34mm, 62mm and Econodual style modules. For EV inverters, a range of technology is being optimized for SiC, from hybrid pack style modules with pin-fin heat sinks to double sided cooled options. Figure 6 shows an ultra-low inductance module proposed by Semikron that allows very fast switching with manageable overshoot voltages. Figure 7 shows a SIP module offered by Apex Microtechnology that incorporates the half-bridge drivers and FETs and its associated high-speed turn-on and turn-off waveforms using UnitedSiC 35mohm, 1200V Stack cascodes.


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Figure 6: A 400A, 1200v module with just 1.4nH loop inductance demonstrated by Semikron in 2017. Flux cancelling low inductance designs are helping unlock the switching speed of SiC and allow performance improvements and cost reductions at the system level



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Figure 7: A SIP module with UnitedSiC 35m, 1200V stack cascodes and a built-in half-bridge driver, being used to switch at 40A, 800V with extremely fast rise and fall times. Such advances simplify the use of high-speed devices and provide large system level cost benefits by shrinking passives though the use of compact high-frequency designs


It has always been assumed that SiC devices would make a large impact at higher voltages. The first 3300V and 6500V modules in the XHP type footprint are now being released, with 10KV on the way. UnitedSiC takes a unique approach to this space with the Supercascode approach, where low resistance 1700V devices are series connected to build higher voltage devices, all controlled by a single low voltage FET at the bottom of the string. This approach has been shown to be quite scalable and allows the implementation of modules from 3300V – 20KV without the need for high voltage chips. This is particularly useful in high voltage solid-state circuit breakers and for implementing solid state transformers connecting to the medium voltage grid.


Rapid progress continues for SiC device and package technology, driving increased market acceptance in a host of fast-growing end market applications. This will push new WBG product development in many distinct directions, from very high speed switched devices for DC-DC conversion, EV on-board chargers and server supplies, to very low conduction loss modules for EV inverters. Large numbers of next-generation system designs that exploit these improved WBG device capabilities are underway, and the market will soon see an entirely new level of power performance and efficiency fueled by SiC technology.