Design Kits for a Tech that Reduces Power Consumption

Date
03/23/2020

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Offers more than 35% efficiency improvement with record-low RDSon of 6mΩmm² and 24V operation addressing consumer, industrial, automotive and computing markets

Tower Semiconductor announced the release of design kits for a novel 0.18um high-performance power management technology which offers over 35% power efficiency improvement and/or equivalent amount of die-area directly contributing to the die’s price competitiveness. This new offering enables scalable IC operation of up to 24 volts making it ideal for the world’s growing consumer, industrial, automotive, and computing markets. This complements the Company’s previously announced low-voltage, 65nm Power BCD process, as well as its high-voltage 140V Resurf bulk and 200V SOI technologies, providing customers with best-in-class performance across the entire range of 1.2V to 200V from a single foundry with the same design tools and design experience. The technology builds on six generations of the Company’s very successful existing high-performance 0.18um power management platforms and is largely backward compatible making it easy to port existing parts and designs to the more efficient novel process.

Specifically, this process offers a profoundly lower Rdson with record-breaking 6mΩmm², 24V operation, smaller footprint, scalable power transistors, and low production mask count, enabling significant performance and cost advantages. In addition, its robust design with high breakdown voltage at all operating conditions provides enhanced IC reliability making it ideal for high-power monolithic ICs in applications such as: DC/DC converters, load switches, PMIC and motor drivers used in laptop processors and fans, drones and robotic motor drivers used in the consumer, computing, automotive and industrial markets.

For more information, please visit: www.towersemi.com.

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