Improving Power Efficiency With a Multi-Disciplinary Approach

Rudy Ramos, Mouser Electronics


Using a blend of new packaging, higher-efficiency switched-mode topologies and state-of-the-art semiconductors

Texas Instruments

Figure 1. A block diagram of a basic voltage-mode control system

Power-efficiency has never been more important, both in portable devices and larger computing equipment, such as servers and base stations.

In portable electronics, such as smartphones and laptops, better power efficiency means longer battery life, possibilities for new functionality or smaller form factors. Moreover, in servers, it reduces the amount of costly power and cooling required.

These are just some of the reasons power system designers are enhancing their conversion processes, using a blend of new packaging, higher-efficiency switched-mode topologies and state-of-the-art semiconductors based on gallium nitride (GaN) and silicon carbide (SiC). Let’s look at how these things are developing.

Topology Improvements

To make full use of all available power, increasing numbers of designs are replacing linear technology with switching. This approach, using switched-mode power supplies (SMPSs), can deliver efficiency in exess of more than 90% and provides many of the benefits we touched on above.

However, switching topologies are more complex to design and require a broader set of skills than linear alternatives. For example, the design engineers need to understand both digital and analog techniques, as well as closed-loop control and magnetics. Additionally, because the high-frequency switching waveforms can cause electromagnetic interference (EMI), printed circuit board (PCB) designers must protect sensitive radio frequency (RF) and analog circuits from the effects of EMI. 

The concepts of switched-mode power conversion have been around for some time. An early example was the 1910 Kettering inductive discharge system, which created a flyback boost converter for ignition in car engines, using a mechanical vibrator.

Over the years, engineers have continued to tweak the standard topologies to overcome the basic designs’ limitations. Many of these improvements have been to the control loop. Standard architectures typically use fixed frequencies and, as loads vary, keep the output voltage the same using either current-mode control (controlling the inductor current) or voltage-mode control (VMC, feeding back part of the output voltage).

A simple closed-loop VMC system is shown in figure 1. The power stage block includes power switches and an output filter. The compensation block has a voltage output divider, error amplifier, loop compensation and voltage reference elements. Meanwhile, the comparator in the pulse width modulator (PWM) measures the error against a fixed ramp to produce an output pulse train with a width proportional to the error signal.

This standard architecture regulates output tightly, even as loads change. It is also straightforward to synchronize with an external clock. However, by incorporating loop compensation, you reduce control loop bandwidth and slow down the transient response. Moreover, running an error amplifier pushes up operating current and makes the circuit less efficient.

One way to improve matters is to adopt the constant-on-time (COT) control scheme. COT requires no loop compensation, while still delivering perfectly acceptable transient performance. It does this with a comparator that compares the scaled output voltage with a reference figure. If the output is lower than the reference, it produces a fixed, on-time pulse. Because this can lead to an extremely high switching frequency when duty ratios are very low, the on-time generatedby the adaptive COT controller changes as a function of both input and output voltage. When conditions are steady-state, this keeps the frequency pretty-much constant.

The D-CAP topology from Texas Instruments further refines the COT approach. By including a ramp voltage in the feedback comparator’s input, the D-CAP controller cuts the noise band and thereby enhances jitter performance. You can see the difference between a standard COT system and a D-CAP variant in figure 2.

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Figure 2. This shows a regular COT topology (a) and a D-CAP topology (b). (Source: Texas Instruments)

Different versions of the D-CAP topology provide optimal performance in specific situations. One example, the TPS53632G, is a half-bridge PWM controller with D-CAP+ architecture that provides fast transient response, lowest output capacitance and high efficiency in single stage conversion.

Thanks to its D-CAP+ architecture for high-current use cases, it can deliver 92% efficiency in a 48V-to-1V point-of-load conversion.

This architecture provides accurate droop control, thanks to its additional component that is proportional to the inductor current in the feedback loop. You also get better DC load accuracy under differing line and load conditions, as a result of an additional error amplifier. A built-in digital-to-analog converter (DAC) sets the controller’s output voltage. The cycle triggers when the error voltage level of the current feedback corresponds to the amplified difference between the feedback output voltage and the DAC set point voltage.

Optimizing Efficiency Under Light Loads

There’s a constant drive in the portable and wearable markets to maximize battery life by improving energy-efficiency under light loads. With many devices spending significant time in low-power modes, optimizing efficiency during these periods is essential.

A topology called Direct Control with Seamless Transition into Power Save Mode (DCS-Control) cherry-picks the best bits from the hysteretic, voltage-mode and current-mode control schemes. As its name suggests, this enhances performance as devices enter and come out of their ‘sleep’ modes and under light loads more generally. The DCS-Control topology supports both Power-Save Mode (PSM) for lighter loads and PWM mode for heavy and medium loads.

In PWM mode, the system runs at its nominal switching frequency, with frequency variation controlled based on the input voltage. As the load current drops, the converter shifts into PSM to keep efficiency high. In this mode, the switching frequency reduces linearly with the load current. Switching between PWM and PSM does not impact on the output voltage and is completely seamless.

Figure 3 shows a block diagram of DCS-Control.

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Figure 3. How the DCS-Control topology is implemented in Texas Instruments’ TPS62130 step-down converter. (Source: Texas Instruments)

Texas Instruments’ TPS6213xA-Q1 converters use the DCS-Control technology, tuned for high-power-density point-of-load uses. Converters with this regulation topology provide fast transient response and highly accurate output voltage, thanks to their typical switching frequency of 2.5MHz. This also means small inductors can be utilized. The TPS62130 works with inputs between 3V and 17V, with 3A continuous output, at output voltages from 0.9V to 6V.

Integrated, Packaged Components Increase Power Density

Cutting the amount of PCB space required is a further way to boost power density. This could involve using a packaged DC/DC module that integrates the power converter’s integrated circuit (IC) with the necessary passive components. Texas Instruments’ MicroSiP and MicroSiL are two options, with the smallest MicroSiP units having a sub-7mm2 footprint.

Integrating components dramatically cuts the amount of PCB real-estate you need, but bear in mind there will be compromises. Stacking the inductor on the controller and mounting the components on a PCB, as the MicroSiP modules do, means each unit is taller than individual components would be. Moreover, by shrinking the footprint, you get a smaller inductor. Moreover, because a coil’s inductance is proportional both to the number of turns and its overall area, if you cut the area but keep the same inductance, you use more wire, which, in turn, increases DC resistance.

New Semiconductor Technologies

As engineers look to achieve ever-greater efficiency, some are replacing silicon power devices with alternatives that use wide-bandgap semiconductor materials, such as GaN and SiC.

Measured in electron volts (eV), a solid material’s bandgap is the difference in energy between the bottom of its conduction band and the top of its valence band. It has a major impact on how electrically conductive the material is. Silicon’s bandgap is 1.1eV – much less than SiC (3.3eV) and GaN (3.4eV). This means that both SiC and GaN require more energy to shift an electron from the valence band to the conduction band.

The biggest benefits to SiC and GaN devices is their high-breakdown-voltage —resistance to electrical breakdown at high voltages where conventional Si device would see current avalanche that would eventually destroy the device—low-on-resistance and reverse-recovery characteristics. They can also be used at higher switching frequencies, which means the transformers, capacitors and inductors can be smaller. Consequently, the overall device can be lighter, cheaper and more compact. DC-DC conversion is also 10% more efficient when using wide-bandgap materials.

The Texas Instruments LMG5200 uses wide-bandgap semiconductors in advanced packaging. This half-bridge power stage incorporates a high-frequency GaN driver and two 80V GaN power field-effect transistors (FETs) into one quad flat no-leads (QFN) package. It can be used in combination with other products, including the TPS53632 step-down driverless controller, in a variety of scenarios, such as 48V point-of-load converters for telecoms, industrial and computing applications, or as synchronous buck converters.

Bringing it All Together

There are many ways to make power conversion denser and more efficient. These include optimizing controller design and packaging and leveraging the latest semiconductor research. Taking a multi-disciplinary approach that brings together all these techniques is the sure way to deliver results that meet the growing needs of a wide range of applications, from low-power wearables up to large-scale data centers and telecoms equipment.

Mouser Electronics