As xPUs intended for AI applications draw more power over each new generation, traditional methods of supplying that energy can no longer work. Normally, the final power-conversion components sit horizontally alongside the xPU, and the energy travels a short distance to the supply pins. However, as power ramps up, so do losses, which are magnified by the travel distance. Those losses manifest as heat, which can destroy components or shorten their operating lifetime if not removed effectively. Traditional heat-removal methods are often bulky, making the final system take up more space than necessary, or, in the case of active cooling, waste even more electricity. The alternative is for designers to find a more efficient way to power the processor, so it generates less heat in the first place. The problem is only getting worse as new xPUs demand more power.
Using an integrated voltage regulator (IVR) to supply power vertically, or from below the processor, cuts the distance that energy needs to travel dramatically, from inches to millimetres. There are quite a few companies trying to make vertical power a reality, from startups to established companies. It is possibly the only viable way that power delivery can keep up with the power demand from xPUs, while allowing data centre operators to fit as many xPUs on the board as possible.
Navitas saw this last conversion step as the final piece of the jigsaw in its data centre strategy of providing a complete solution from the electrical grid to the chip. To fill that gap, the company bought startup Claros for an estimated $232 million, which in itself shows that the potential market value for vertical power delivery is enormous. Navitas CEO, Chris Alexandre took some time out to give PSD an insight into the thinking behind the acquisition.
PSD - Why do you see it as necessary to enter into this part of the market?
CA - You have the grid energy, which is the world of high voltage SiC. We have that covered. Then 800V to 6V is becoming the backbone for distribution for AI compute. That's basically a monstrous centralized HVDC DC converter. We have that covered. If you talk to hyperscalers, they are taking full control of grid to XPU. The last step is where the bottleneck is going to be. We know exactly how to do the grid. We know exactly how to do the racks. The last step is where the challenge is, because you have so much current going to the to the processors that lateral power doesn't work. You have to go vertical. Some companies are trying to do this in a very classic way, by taking the MOSFETs, the inductors, the capacitors, the controlle, etc. and putting them in a very big module on the backside. That is like moving from a six-cylinder to an eight-cylinder car, it's better, but it's not an electric car. IVR is the electric car, it is a complete pivot.
PSD - When so many companies are attempting to solve the same problem, what made Claros stand out?
CA - It is all about flexibility and scalability. A lot of IVR companies have tried to create a chip for a specific customer. They want to win Nvidia, so they make a chip that Nvidia might use, or it could be a bespoke chip for Google, or Amazon. However, I think there will be as many XPU types as there are use cases in the future. There are going to be ASICs, HBM and other high power draw components, not just GPUs. That means you need to have something that is both flexible and scalable. Claros specialize in system-level design and the company has focussed on designing in scalability from the start. Many of its competitors are power companies who have come from the transistor side, and initially designed a stack and then tried to figure how it can be scaled. Its not just me that thinks that, Claros also have a lead customer who especially valued the company’s flexibility and scalability.
PSD - What can you tell us about the Claros solution?
CA - We will host a webcast later in the month to go deeper into the technical details. Today, what I can tell you is that Claros produce what I call an IVR stack, a 10A building block that can be basically copied and pasted next to each other as many times as needed. The IVR stack contains the substrate, the capacitors, the coils, the FinFETs, and the control. The stack is all on one piece of silicon, and no other external components required, which is pretty unique in itself. The controller and current sensor are designed to connect stacks together and allow them to communicate with each other to balance the current. This happens both between stacks inside a package and between stacks in different chips.
If the stack is packaged and placed on the back side of the PCB, you have basic vertical power delivery (VPD). The stack can also be situated inside the PCB, or even inside the substrate of the xPU to become embedded power delivery. We call our package IVR solutions NAVPIVR and embedded IVR solutions NavEIVR. These different methods of deploying the same stack are just part of the flexibility.
Claros already has a VPD chip, as that’s what its first customer required. It is a 40A chip using 4 IVR stacks. The customer uses 64 of those chips in a 2000A array. Claros is currently working on a 160A chip using 16 stacks. The main challenge is with the packaging itself and thermal management, rather than getting the stacks to work together. 64 of these chips will provide a 10,000A solution.
Claros also has lead customers for embedded IVRs.
PSD - So you thing that data centre operators will soon be more concerned about bespoke solutions than off-the-shelf?
CA - The beauty of Claros’ design is that some customers want to have 30 form factors, depending on their use case, cold plate, or cooling system. Claros’ current customer uses the 64 chips in a hollow square type design, not a typical eight by eight array. That is only possible because of how each of those chips talk to each other within the array. The Claros system can cater for as many XPUs as there are applications. We call this the Navitas PowerArray architecture, which is designed to be scalable and configurable to each xPU's current and power delivery requirements. You're going to see a flurry of new processors and everybody is going to have a different use case. One might need 2000A, one 3000A, and another will need a different configuration because of the shape of the cooling plate. The Claros design is fully flexible and can be adapted for any use case. Most IVR companies that I have talked to have not figured this out.
PSD - Will Claros remain a separate entity within Navitas?
CA - Yes, Claros employees are now part of Navitas, and part of our new IVR business unit. The IVR unit will work beside our GaN and SiC business units. Claros is also based in California, and like Navitas and they have a very similar move fast, disrupter type of culture. so the two companies are a great match, not just the technology.
PSD - You have told us about the value that Claros can add to Navitas. What value can Navitas add to Claros?
CA - Navitas operates in high-power GaN and SiC processes, very advanced packaging and passive integration. Claros uses silicon fabrication through the Samsung fabrication process. Technically we are very different. They don't really need our help, as they have a good team and know exactly what they are doing.
Where I do think we can assist is helping them is to scale. We have shipped 350 million units of GaN and SiC, and we can help them get to market. As we both have the same customers, when we talk to the XPU guys, the GPU guys, the hyperscalers about GaN and SiC, now we can also talk about IVR. We can also use our experience to help them scale up on the manufacturing side.