Smart dimming technologies

Author:
David Gamperl, ams

Date
01/28/2017

 PDF
Proper illumination can help optimize visual impact and power consumption of new HDR TVs

Resolution is the most obvious battleground on which rival television and display manufacturers fight. Consumers have been willing to pay a premium for high-definition HD) displays, and, more recently, for 4k displays. Eventually, ultra-high definition 8k displays are expected to supersede the current generation of high-end TVs.

But with the introduction of High Dynamic Range (HDR) displays, consumers are learning that contrast also has a strong impact on the viewing experience (see Figure 1). By providing a much greater contrast between the brightest light colors and the deepest, darkest blacks, an HDR display offers a richer, more exciting and more vivid viewing experience.

The development of new HDR displays, however, poses a power-system design problem for display manufacturers: the requirement for high contrast calls for a very high-brightness back-light, able to reproduce extremely bright portions of an image faithfully. But the very high-current display circuit must also be dimmed down to extremely low levels to render the dark portions of the image correctly. At the same time, TV manufacturers must comply with stringent regulations and guidelines, such as the US Department of Energy’s ENERGY STAR program, which strictly limit the average power consumption of a new TV.

Conventional pulse width modulation (PWM) backlight dimming methods alone can achieve no better than a 1:1000 ratio between the highest and lowest current level. If implemented in a high-performance HDR display, a power controller IC with digital PWM dimming alone will result in wasted power and impaired picture quality. This is why a new approach to TV backlight power control is needed, to provide a wider spread between peak and minimum brightness levels, as well as to provide for granular local control of multiple segments of the display screen’s back-light (see Figure 1).

Click image to enlarge

Figure 1: according to AMD’s graphics processor division Radeon Technologies Group, HDR dis-plays should be able to render images with a dynamic range close to that of the human eye. (Image credit: Radeon Technologies Group)

New peak illuminance requirement in HDR displays

Dolby, through its Dolby Vision initiative, was the first company to demonstrate the way an HDR TV could perform. Its 2015 demonstration unit had a peak display brightness of 4000 nits. By comparison, today’s HD or 4K TVs typically have a peak brightness of around 300 nits. The dramatic increase in peak illuminance both enables the TV to reproduce very bright images faithfully, and extends the contrast between bright and dark displayed images.

The very large contrast ratio is both the factor which makes an HDR display so pleasing to watch, and which makes the power system design so difficult. This is because, in order to re-produce deep blue, black and grey colors correctly, the backlight needs to be dimmed down to very low levels. This means that if peak brightness is 4000 nits, and a conventional PWM controller can dim at best to 0.1%, then the minimum display brightness is not low enough, and dark blacks will all be rendered as the same greyish color.

In practice, manufacturers of today’s HDR displays are therefore specifying a peak brightness of around 800-1000 nits, a compromise which provides for better rendering of very dark colors, but which blunts the appeal of HDR displays by reducing the vividness of the brightest colors.

By relying on digital PWM control alone, there is no way out of this problem: a PWM-controlled metal–oxide–semiconductor field-effect transistor (MOSFET) has a certain minimum on-time, which is determined by its turn-off delay and fall time characteristics. The turn-off delay and fall time are basic properties of the power device’s silicon, and these properties prevent PWM controllers from dimming to any less than 0.1% of peak output. 

How local dimming helps improve display contrast performance

The way in which the display is backlit affects contrast, as well as the dimming arrangement. Most TVs with LED backlights found in homes today are edge-lit, and implement global dimming. This means that if most of the image is bright, the backlight for the entire display is driven at or close to full power; if most of the image is dark, the backlight for the whole display is dimmed to a low level. Global dimming is therefore unsuitable for HDR displays, particularly because it is poor at handling the type of image shown in Figure 1, in which both bright and dark portions have to be displayed simultaneously.

In the end, HDR technology calls for direct backlighting with local dimming – a backlight architecture which requires more individual LEDs, more LED channels and a more complex LED driving system. It is therefore more expensive. But by dividing the display’s backlighting system into segments – typically today between 16 and 256 in a direct-backlit 47” TV – the backlight brightness can be precisely matched to the content of the image shown in the small square display area served by each segment. Deep dark blues and bright whites can therefore be dis-played simultaneously, with no power wasted on the backlighting of dark portions of the image.

This local dimming approach calls for the LED driver to be synchronized to the video or graphics processor (GPU). If the interface between the devices allows, the backlight driver may be directly controlled by the GPU.

Local dimming is a feature enabled by a backlight controller, such as the AS3824 LED from ams. Figure 2 shows how a vertical synchronization signal (VSYNC – a patented feature of ams LED controllers) may be used to mark the start of each new frame, providing a synchronization input to a backlight controller. The diagram shows that, in frame 1, a bright image calls for a very high PWM duty cycle in segment 1, while segment n has a reduced PWM duty cycle be-cause it is rendering a darker portion of the image. Then in frame 2, new video content means that the brightness of the segments must change. Instructions for new PWM duty cycles in segment 1 and segment n are sent by the GPU during frame 1, and the segments’ signals are refreshed with the rising edge of frame 2.

Figure 2 also shows a delay between the rising/falling edge of VSYNC and the rising edge of the PWM signal. In the AS3824 controller, this delay is programmable, enabling the display manufacturer to compensate for the turn-on delay of the LCD’s pixels so that the LEDs begin to draw current exactly at the same time as the pixels are turned on. The result is improved picture quality and minimized power consumption. Delaying the PWM turn-on also reduces the load on the LEDs’ power supply, enabling the system to generate less noise and interference.

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Figure 2: a synchronization signal ensures that the backlight dimming signals are not out of phase with the frame timing

Analog dimming: a method for boosting peak brightness

Multi-channel LED controllers – which provides individual control of multiple channels – enable granular local dimming of segments of a display. Up to 32 AS3824 ICs may be daisy-chained via their SPI interface to control displays with more than 16 segments (see Figure 3).

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Figure 3: each daisy-chained AS3824 controller can control the LEDs in up to 16 display segments

But manufacturers of HDR displays still face the problem of the contrast ratio. How can they increase peak brightness above 1000 nits while retaining the ability to render very dark colors?

The answer is a patented innovation introduced in the AS3824 controller IC: an analogue method for boosting the PWM-controlled current. This can boost the current controlled by the PWM signal by up to a factor of eight over its base level, to illuminate properly the brightest segments of an image.

At the same time, the darkest channel could have an analog LED cur-rent of just 10% of its base value, turned on for the minimum PWM duty cycle – potentially as little as 0.1%. In other words, the dynamic range of the digital PWM part of the dimming scheme is unchanged, but the additional analog scale extends the total (analog + digital) dynamic range (see Figure 4).

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Figure 4: the combination of digital and analog dimming signals, as shown in segment 1/frame 1, provides for a greater contrast ratio between the brightest and the darkest segments of the screen

The addition of analog dimming is implemented through DACs integrated in the AS3824, which provide a reference voltage output determined by a digital signal input from the display’s video processor or GPU. Amplified, this reference voltage controls the amplitude of the current sup-plied by the FET that powers the channel’s LEDs. In effect, the application of analogue current control produces a power scheme based on simultaneous pulse width modulation and pulse amplitude modulation.

The AS3824 may be used to drive FETs or BJTs with a high current rating. It is important to regulate any external switch-mode power supply so that its output voltage is matched to the voltage requirements of the LED strings connected to it. Voltage headroom above that required by the FETs controlled by the AS3824 leads to power dissipation, reducing system efficiency.

To enable this, the DC-DC feedback function of the AS3824 works with any kind of DC-DC converter (boost or buck), as well as with other converter architectures such as LLC controllers, by sinking the current across R1 to its feedback (FB) pins (see Figure 5). The timings of the feed-back function are fully programmable via SPI. In manual feedback mode, the output voltage of the SMPS can be adjusted directly by the multi-channel controller. In this manner, the controller is always in full control of the output voltage of the SMPS, thus helping to minimize system power losses.

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Figure 5: the feedback function in AS3824 controllers helps optimize the regulation of the SMPS output voltage

Sophisticated power control for better contrast ratios

Implementation of LED backlighting control provides for granular, multi-channel control of a direct backlit display screen, as well as an analogue + digital dimming range many times wider than that of a typical LED backlight controller using digital-only PWM dimming.

The result is a dramatically improved contrast ratio to allow the reproduction of the brightest white colors in some segments of a display at the same time as rendering deep dark blues and grays in other segments, providing a viewing experience dramatically better than that in today’s HD and 4k TVs and displays.

Resolution revolution

Resolution is the most obvious battleground on which rival TV and display manufacturers fight. But with the introduction of High Dynamic Range (HDR) displays, consumers are learning that contrast also has a strong impact on the viewing experience. By providing a much greater con-trast between the brightest light colors and the deepest, darkest blacks, an HDR display offers a richer, more exciting and more vivid viewing experience.

The development of new HDR displays, however, poses a power-system design problem for display manufacturers to solve: the requirement for high contrast calls for a very high-brightness backlight, able to reproduce extremely bright portions of an image faithfully. But the very high-current display circuit must also be dimmed down to extremely low levels to render the dark por-tions of the image correctly.

Conventional PWM backlight dimming methods alone can achieve no better than a 1:1000 ratio between the highest and lowest current level. If implemented in a high-performance HDR dis-play, a power controller IC with digital PWM dimming alone will result in wasted power and im-paired picture quality.

Innovative LED power controller technology which overlays analog current control on top of the conventional PWM dimming signal, can provide for a hugely increased dimming scale compared to digital PWM-only control. This enables display manufacturers to achieve much higher contrast ratios than today, for a vastly improved viewing experience.

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